Inductors are linear, passive devices that are well known in the electrical engineering arts. Essentially, an inductor is a helically wound coil of wire that stores energy in the form of a magnetic field when an electrical current flows through the wire. A magnetically permeable core material, such as iron, can be used to increase the inductive value of the inductor. Inductors are characterized by inductive reactance in accordance with the following expression:XL=2·π·f·L  (Equation 1
Wherein:                XL is the inductive reactance in Ohms;        f is the frequency of the applied current in Hertz; and;        L is the value of the inductor in Henries.Inductive reactance is akin to resistance, wherein the reactive value XL increases with applied frequency.        
Inductors are commonly applied in many types of circuits due, among other reasons, to their reactive behavior that is complimentary in nature to the capacitive reactance of capacitors. Non-limiting examples of circuits that utilize inductors include oscillators, filters, radio frequency tuning stages, and a myriad of others. Unfortunately, inductors are generally bulky in comparison to modern semiconductor circuitry. In the interest of addressing the immediately foregoing and other concerns, circuits that simulate electrical inductance without the use of actual inductors have been devised. Such inductive simulation circuits are commonly referred to as active inductors. One feasible way to implement such active inductor circuits is to use so-called Operational Transconductance Amplifier (OTA) circuits within a special feedback topology. These circuits are commonly referred to as “gyrators”.
FIG. 1 depicts a gyrator circuit (gyrator) 100 in accordance with known techniques. The gyrator 100 includes a first circuit portion 102 comprising a plurality of inverters 104A through 104F. Each of the inverters 104A-104F is defined by a pair of nMOS and pMOS transistors coupled in a series circuit arrangement. Specifically, each inverter 104A-104F includes a nMOS transistor 106 and a pMOS transistor 108. Each transistor 106 has a source node coupled to a source of ground (i.e., negative) potential, and a drain node coupled to an output node for that particular inverter 104A-104F. In turn, each transistor 108 includes a source node coupled to the output node for that particular inverter 104A-104F, and a drain node coupled to a source of positive potential. The transistors 106 and 108 include respective gate nodes that are connected together to define an input node for that particular inverter 104A-104F. Moreover, circuit portion 102 can be structured as follows: the inverters 104A-104B form an OTA circuit that is loaded by the inverters 104C-104F. In this way, the first circuit portion 102 includes a total of six inverters 104A through 104F, respectively.
The gyrator 100 also includes a second circuit portion 110. The second circuit portion 110 includes a plurality of inverters 104G through 104L. Each of the inverters 104G-104L is defined by an nMOS transistor 106 and a pMOS transistor 108 having the respective nodal characteristics and coupling/connecting as described above in regard to the inverters 104A-104F of the first circuit portion 102. Therefore, the second circuit portion 110 includes a total of six inverters 104G through 104L, respectively.
The gyrator 100 further includes a third circuit portion 112. The third circuit portion 112 includes two input biasing stages 114A and 114B, respectively. Each input biasing stage includes an nMOS transistor 116 and a pMOS transistor 118 and a resistor 120.
It is noted that the second circuit portion 110 is connected to the first circuit portion 102 by way of four respective nodes 130, 132, 134 and 136. In this way, the second circuit portion 110 is connected in feedback circuit arrangement with the first circuit portion 102 of the gyrator 100. Nodes 130 and 134 further define (i.e., are electrically equivalent to) first and second gyrator input nodes, respectively. Additionally, nodes 132 and 136 further define first and second gyrator output nodes, respectively. The gyrator 100 includes twelve inverters 104A-104L, comprising twenty-four transistors. Overall, the gyrator 100 includes a total of (at least) twenty-eight transistors, including the biasing circuitry of the third circuit portion 112.
Generally known gyrator practice involves the use of Operational Transconductance Amplifier (OTA) circuits which are interconnected with one another with feedback and are capacitively loaded so as to simulate inductive behavior at their input terminals. Modern communication standards require this inductive behavior at very high frequencies. Fortunately, technological scaling has resulted in steadily improving high frequency characteristics within individual MOS transistor devices. However, decreasing supply voltages complicate the realization of sufficiently linear active inductor circuits. While the known gyrator 100 represents one approach to simulating electrical inductance and providing sufficient linearity, gyrator circuits capturing even higher frequencies while maintaining linearity are desirable.